A design methodology achieving fast development cycles for complexVLSI architectures

摘要

A design methodology that accomplishes fast design cycles forncomplex VLSI circuits and maintains a high level of integration andnperformance is presented. A configurable RISC microprocessor is thensystem core. Flexible and regular cells are used to automaticallyngenerate digital and analog hardware blocks. Together with thisnpick-and-place design methodology of the system architecture, anhigh-level development system leads to shortened design times