A cell placement method for two-based chip layout is proposed. Thenproposed method utilizes the structural properties of its input circuitsnto guide the placement process. The algorithm first extracts thenstrongly connected subcircuits called cones from the circuit and thenngroups small cones called fragments further in order to reduce thennumber of extracted cones. The algorithm then performs a macrocellnplacement on cones which are treated as soft macros, followed by mappingnthe resulting macrocell placement into a cell-row placement. Finally,nthe algorithm applies a simulated-annealing procedure to refine thenrow-based placement. By utilizing the structural properties of thendesign, the method is fast and is able to produce a higher qualitynplacement compared to other straightforward placement methods
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