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Development of a large pixel spectrally optimized pinned photodiode/interline CCD detector for the Earth Observing System/Moderate-Resolution Imaging Spectrometer-Tilt Instrument

机译:用于地球观测系统/中分辨率成像光谱仪-倾斜仪的大像素光谱优化固定式光电二极管/行间CCD检测器的开发

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Abstract: A pinned photodiode/interline CCD detector array is under development for the EOS/MODIS-T project. Outstanding features of the device include large pixels, spectrally optimized fill factors, and blooming protection. The detector has 30 spatial rows and 32 spectral columns. The device layout is split into two halves. Each half has its own detector area, storage area, and output structure. The detector area contains the array of 161.7 $mu@m by 220.5 $mu@m pixels with two light sensitive photodiodes per pixel. The diodes are pinned to improve image lag and quantum efficiency. The interline CCD and antiblooming structures are connected in series to the photodiodes. The interline CCD is a four-phase transfer device which combines signal charge from both photodiodes of a detector pixel. The channel width of the interline CCD in each column is dimensioned to optimize the device fill factor in the corresponding spectral band. Each storage area contains a CCD register capable of holding signal from half of the detector. These CCDs are designed to provide an interface between the interline CCD channels (pitch $GRT 200 $mu@m) and the output register pixels (pitch $EQ 52 $mu@m). Each output register is a serial CCD that accepts charge packets in parallel from the storage areas. Charge packets are transferred to a floating diffusion output which converts the signal charge to a voltage difference. The 51 pad silicon chip is about a half inch square and fits into a standard 64 pin DIP package for testing.!
机译:摘要:针对EOS / MODIS-T项目,正在开发固定式光电二极管/线间CCD检测器阵列。该器件的突出特点包括大像素,经光谱优化的填充因子和光晕保护。检测器具有30个空间行和32个光谱列。设备布局分为两半。每个半都有自己的检测器区域,存储区域和输出结构。探测器区域包含161.7 µm×220.5 µm @ m像素的阵列,每个像素有两个光敏光电二极管。二极管被钉扎以改善图像滞后和量子效率。线间CCD和防晕结构与光电二极管串联。线间CCD是一种四相传输设备,它将来自检测器像素的两个光电二极管的信号电荷组合在一起。调整每列中的行间CCD的通道宽度,以优化相应光谱带中的器件填充因子。每个存储区都包含一个CCD寄存器,该寄存器能够保存来自检测器一半的信号。这些CCD旨在提供行间CCD通道(间距$ GRT 200 $ mu @ m)和输出寄存器像素(间距$ EQ 52 $ mu @ m)之间的接口。每个输出寄存器是一个串行CCD,可从存储区并行接收电荷包。电荷包被传输到浮动扩散输出,该浮动扩散输出将信号电荷转换为电压差。 51垫硅芯片约为半平方英寸,可装入标准64引脚DIP封装中进行测试。

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