首页> 外文会议>Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International >A full 4-channel 6.3Gb/s 60GHz direct-conversion transceiver with low-power analog and digital baseband circuitry
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A full 4-channel 6.3Gb/s 60GHz direct-conversion transceiver with low-power analog and digital baseband circuitry

机译:具有低功耗模拟和数字基带电路的完整4通道6.3Gb / s 60GHz直接转换收发器

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This paper presents a 60 GHz direct-conversion front-end and baseband transceiver, including analog and digital circuitry for the PHY functions. The 65 nm CMOS front-end consumes 319 mW and 223 mW in transmitting and receiving mode, respectively, and is capable of more than 7 Gb/s 16QAM wireless communication for every channel of the 60 GHz standards. The 40 nm CMOS baseband incorporating LDPC consumes 196 mW and 398 mW for 16QAM in transmitting and receiving mode, respectively. The entire system, using a 6dBi antenna built in an organic package, can transmit 3.1Gb/s over 1.8 m in QPSK and 6.3 Gb/s over 0.05 m in 16QAM.
机译:本文介绍了一种60 GHz直接转换前端和基带收发器,包括用于PHY功能的模拟和数字电路。 65 nm CMOS前端在发送和接收模式下分别消耗319 mW和223 mW,并且对于60 GHz标准的每个通道,能够进行超过7 Gb / s的16QAM无线通信。包含LDPC的40 nm CMOS基带在16QAM的发射和接收模式下分别消耗196 mW和398 mW。整个系统使用内置于有机封装中的6dBi天线,可以在QPSK上以1.8 m的速度传输3.1 Gb / s,在16QAM上以0.05 m的速度传输6.3 Gb / s。

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