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Interpolation-Based Learning as a Mean to Speed-Up Bounded Model Checking (Short Paper)

机译:基于插值的学习可加快有界模型检查的速度(论文)

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摘要

In this paper (This is a short paper accepted in the new ideas and work-in-progress section of SEFM 2017.) we introduce a technique to improve the efficiency of SAT calls in Bounded Model Checking (BMC) problems. The proposed technique is based on exploiting interpolation-based invariants as redundant constraints for BMC. Previous research addressed the issue using over-approximated state sets generated by BDD-based traversals. While a BDD engine could be considered as an external tool, interpolants are directly related to BMC problems, as they come from SAT-generated refutation proofs, so their role as a SAT-based learning is potentially higher. Our work aims at understanding whether and how interpolants could speed up BMC checks, as they represent constraints on forward and backward reachable states at given unrolling boundaries. Being this work preliminary, we do not address a tight integration between interpolant generation and exploitation. We thus clearly distinguish an interpolant generation (learning) phase and a subsequent interpolant exploitation phase in a BMC run. We experimentally evaluate costs, benefits, as well as invariant selection options, on a set of publicly available model checking problems.
机译:在本文中(这是SEFM 2017的新思想和正在进行的部分中接受的简短论文。)我们介绍了一种提高边界模型检查(BMC)问题中SAT调用效率的技术。所提出的技术是基于利用基于插值的不变性作为BMC的冗余约束。先前的研究使用基于BDD的遍历生成的过高状态集解决了该问题。虽然可以将BDD引擎视为外部工具,但由于插值来自SAT生成的反驳证明,因此它们与BMC问题直接相关,因此它们作为基于SAT的学习的作用可能更高。我们的工作旨在了解内插器是否以及如何加快BMC检查的速度,因为它们代表了在给定展开边界处向前和向后可到达状态的约束。作为这项工作的前期工作,我们不会解决插值生成与利用之间的紧密结合。因此,我们在BMC运行中清楚地区分了插值生成(学习)阶段和随后的插值开发阶段。我们通过一系列公开可用的模型检查问题,实验性地评估成本,收益以及不变的选择选项。

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  • 来源
  • 会议地点 Trento(IT);Vienna(AU)
  • 作者单位

    Dipartimento di Automatica Ed Informatica, Politecnico di Torino, Turin, Italy;

    Dipartimento di Automatica Ed Informatica, Politecnico di Torino, Turin, Italy;

    Dipartimento di Automatica Ed Informatica, Politecnico di Torino, Turin, Italy;

    Dipartimento di Automatica Ed Informatica, Politecnico di Torino, Turin, Italy;

    Dipartimento di Automatica Ed Informatica, Politecnico di Torino, Turin, Italy;

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  • 正文语种 eng
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