CONCEPTUAL DESIGN OF IMPEDANCE MONITOR FOR HVDC STATION

摘要

A conceptual design of an impedancernmonitor has been developed for determination of thernpositive-sequence network impedance characteristicsrnover a frequency range of 30 Hz to 400 Hz withoutrndisturbing the system. It incorporates 1) a 60 Hzrncancellation filter based on a phase locked loop,rn2) Clarke’s transformation and Park’s transformation,rnand 3) a transfer function approach for determination ofrnthe system impedance. This new approach to systemrnimpedance measurement substantially improves thernsignal to noise ratio, reduces the effects of backgroundrnnoise and enables continuous monitoring the systemrnimpedance.rnThe paper presents the theory and designrnimplementation of a new impedance monitor developedrnfor an HVDC station.