Abstract: Implementation and test results of an array for image applications with full-frame analog memory is presented. The array was implemented using 1.0 $mu@m double metal, single poly n-well standard CMOS technology. The sensor consists of a 24 by 24 pixels square array and circuitry for random access readout. A pixel is composed by a phototransistor and control circuitry to regulate the exposure time to light of phototransistors. Each pixel also includes an analog memory implemented using MOSFET capacitors. The output buffer drives the capacitance of the output line. The system requires a total core area of 5 mm$+2$/. Tests were performed for each individual pixels and for the complete array. The voltage output as a function of integration time under different illumination levels shows a linear behavior. Varying the exposure time is possible to change the detector sensitivity. The fixed pattern noise was 0.58 percent of saturation level. Memory capabilities were also tested, allowing non-destructive reading and a storage time over few seconds without a significant degradation. !7
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机译：摘要：提出了具有全帧模拟存储器的图像应用阵列的实现和测试结果。该阵列是使用1.0μm双金属，单多晶硅n阱标准CMOS技术实现的。该传感器由一个24 x 24像素的正方形阵列和用于随机访问读出的电路组成。像素由光电晶体管和控制电路组成，以调节光电晶体管对光的曝光时间。每个像素还包括一个使用MOSFET电容器实现的模拟存储器。输出缓冲器驱动输出线的电容。该系统需要的总核心面积为5 mm $ + 2 $ /。对每个单独的像素和整个阵列进行测试。在不同照明水平下，输出电压随积分时间的变化呈线性关系。改变曝光时间可以改变检测器的灵敏度。固定模式噪声为饱和度的0.58％。还测试了内存功能，可以无损读取并在几秒钟的时间内存储时间，而不会造成明显的性能下降。 ！7
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