Technology Innovations and Process Integrations for Sub-100nm Gate Patterning

摘要

This paper presents a brief overview of the Applied Centura~(~R) DPS~(~R) system, configured with silicon etch DPS II chamber, with emphasis on discussing tuning capability for CD uniformity control. It also presents the studies of etch process chemistry and film integration impact for an overall successful gate patterning development. Discussions will focus on resolutions to key issues, such as CD uniformity, line-edge roughness, and multilayer film etching integration.