首页> 外文会议>Rapid System Prototyping (RSP), 2007 18th IEEE/IFIP International Workshop on >A Lightweight Framework for Runtime Reconfigurable System Prototyping
【24h】

A Lightweight Framework for Runtime Reconfigurable System Prototyping

机译:用于运行时可重配置系统原型的轻量级框架

获取原文
获取外文期刊封面目录资料

摘要

This paper describes a lightweight framework for prototyping runtime reconfigurable systems in a Xilinx Virtex-II Pro FPGA. The framework provides a reconfiguration and control infrastructure that allows components of the prototype system to be modified or exchanged at runtime by means of partial reconfiguration of the FPGA. The system state may be monitored and influenced by a programmable controller which is part of the framework. The area overhead of the framework is kept low by efficiently utilising the two hard-wired PowerPC processor cores inside the FPGA while avoiding the use of resource-intense bus structures. Specific lean input/output modules are used with the one processor core while the other implements a Xilinx UltraController-II based design.
机译:本文描述了一个轻量级框架,用于在Xilinx Virtex-II Pro FPGA中对运行时可重配置系统进行原型设计。该框架提供了一种重新配置和控制基础结构,该结构允许通过FPGA的部分重新配置在运行时修改或交换原型系统的组件。系统状态可以由作为框架一部分的可编程控制器来监视和影响。通过有效利用FPGA内的两个硬接线PowerPC处理器内核,可保持框架的区域开销较低,同时避免使用资源密集型总线结构。特定的精益输入/输出模块与一个处理器内核一起使用,而另一个则实现基于Xilinx UltraController-II的设计。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号