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Understanding the effects of wrong-path memory references on processor performance

机译:了解错误路径的内存引用对处理器性能的影响

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High-performance out-of-order processors spend a significant portion of their execution time on the incorrect program path even though they employ aggressive branch prediction algorithms. Although memory references generated on the wrong path do not change the architectural state of the processor, they can affect the arrangement of data in the memory hierarchy. This paper examines the effects of wrong-path memory references on processor performance. It is shown that these references significantly affect the IPC (Instructions Per Cycle) performance of a processor. Not modeling them can lead to errors of up to 10% in IPC estimates for the SPEC2000 integer benchmarks; 7 out of 12 benchmarks experience an error of greater than 2% in IPC estimates. In general, the error in the IPC increases with increasing memory latency and instruction window size.We find that wrong-path references are usually beneficial for performance, because they prefetch data that will be used by later correct-path references. L2cache pollution is found to be the most significant negative effect of wrong-path references. Code examples are shown to provide insights into how wrong-path references affect performance.
机译:高性能无序处理器即使使用积极的分支预测算法,也会在错误的程序路径上花费大量执行时间。尽管在错误的路径上生成的内存引用不会更改处理器的体系结构状态,但它们可能会影响内存层次结构中的数据排列。本文研究了错误路径存储器引用对处理器性能的影响。结果表明,这些参考显着影响处理器的IPC(每个周期的指令)性能。如果不对它们进行建模,则可能导致SPEC2000整数基准的IPC估计误差高达10%;在12个基准测试中,有7个的IPC估计误差超过2%。通常,IPC中的错误会随着内存等待时间和指令窗口大小的增加而增加。我们发现错误路径引用通常对性能有好处,因为它们会预取供以后的正确路径引用使用的数据。发现L2cache污染是错误路径引用的最显着负面影响。显示了代码示例,以深入了解错误路径引用如何影响性能。

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