首页> 外文会议>Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays >Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method
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Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method

机译:FPGA技术在加速时域有限差分(FDTD)方法中的应用

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The continuing advances in the field of electrical engineering, in areas like cellular communications, fiber optics, mobile and multi-gigahertz electronics have necessitated a computer-assisted design approach to the complex electromagnetic interactions and problems that arise. Finite-Difference Time-Domain (FDTD) Analysis is a very powerful tool for the modeling of electromagnetic phenomena. The algorithm is computationally intensive and simulations can run for a few hours to several days. Increasing the computation speed and decreasing the run times of this algorithm would bring greater productivity and new avenues of research to many facets of electrical engineering.The algorithm is transferred to custom FPGA-based hardware using a pipelined bit-serial arithmetic architecture. A one-dimensional resonator is used to verify the implementation and explore the hardware speed and costs. The computational speed is extremely fast and is not related to the number of computational cells in the simulation. Finally, a discussion of future research is presented.
机译:电气工程领域的不断发展,例如蜂窝通信,光纤,移动和千兆赫兹电子学领域,需要一种计算机辅助设计方法来解决复杂的电磁相互作用和出现的问题。时域有限差分(FDTD)分析是一种非常强大的电磁现象建模工具。该算法需要大量的计算,并且模拟可以运行几个小时到几天。提高该算法的计算速度并减少其运行时间将为电气工程的许多方面带来更高的生产率和新的研究途径。该算法使用流水线位串行算法架构转移到基于FPGA的定制硬件上。一维谐振器用于验证实现并探索硬件速度和成本。计算速度非常快,并且与仿真中的计算单元数无关。最后,提出了对未来研究的讨论。

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