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Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation

机译:通过预取和基于关键程度的资源分配来减少过程可变性的影响

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摘要

A major problem facing the computer and semi-conductor industries is the increasing amount of CMOS process variability [1, 3]. Variability in low-level circuit parameters, such as transistor gate length and gate oxide thickness, complicates system design by introducing uncertainty about how a fabricated system will perform. Although a circuit or chip is designed to run at a nominal clock frequency, the fabricated implementation may vary far from this expected performance.
机译:计算机和半导体行业面临的主要问题是CMOS工艺可变性的增加[1,3]。诸如晶体管栅极长度和栅极氧化物厚度之类的低级电路参数的可变性,由于引入了有关已制成系统将如何执行的不确定性,使系统设计变得复杂。尽管电路或芯片被设计为以标称时钟频率运行,但是制造的实现可能与预期的性能相差很大。

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