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Designing with extreme parallelism

机译:以极高的并行度进行设计

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摘要

Modern FPGAs can implement large, custom compute engines that are designed to exploit extreme amounts of parallel computation. Through parallelism, these systems achieve orders of magnitude higher performance than the fastest microprocessors. Building such custom compute engines with existing hardware design languages is too difficult and time-consuming. For this to become mainstream technology, the task of designing such parallel systems must be as simple as possible. Thus, high-level languages are needed which can specify a custom compute engine or be compiled to run on predesigned parallel systems. In this workshop, we will examine several approaches for specifying extremely parallel computations in high-level languages. These can be used to build parallel systems in FPGAs, or they can be used to specify parallel computations in other competing architectures. By examining several different approaches, one gains insight into the best approach for solving a given problem. Ideally, this will also inspire new approaches for designing with extreme parallelism>>> af++ US6021266A . 2000-02-01

机译:使用具有并行性和握手通信的调度和分配来设计集成电路的方法,以及通过该方法设计的集成电路

  • 机译:利用并行调整机制的并行调整机制和压模装置,以及并行调整机制的压模装置

  • 机译:用于并行调整的图形打印系统,打印设备,打印控制设备,用于并行调整的图形打印方法以及用于并行调整的图形打印程序

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