Field Programmable Gate Arrays for Control Loop of Sine Wave Inverters

摘要

Design approaches for DSP based control algorithms for harmonic control & rms value of output were discussed in [3-7] for a sine wave inverter design. However due to rigid hardware within a DSP makes the implementation time consuming, costly for the design and the full capacity of the DSP is not utilized. As an alternative, Field Programmable Gate Array (FPGA) sub systems can be used in the control loop of an inverter power stage easily. Attractive features of this approach are that, fast implementation, lower cost, shorter design cycles and speed of the loop, particularly in a case where a PWM waveform with flexible timing could be generated using digital potentiometer arrays. Preliminary investigations on FPGA approach in the control loop of a practical power stage with a power filter output is discussed in the paper taking into account the hardware aspects of the control loop design.