Radiation hardness of the mixed-mode ASIC's dedicated for the future high energy physics experiments

摘要

The Application Specific Integrated Circuits (ASICs) are widely used for the detector readout in the High Energy Physics (HEP) environment. The ASICs have to work in high radiation environment and provide the basic parallel signal processing from a huge number of detector channels, including substantial data compression. The reliability of the ASICs is a critical issue for the data taking efficiency of the whole system. In the paper the examples of several ASIC design blocks are given with a special focus on the features providing reliability in radiation environment. The problems of the architecture choice, ASIC synchronization, and redundancy is discussed in detail. These aspects of design will be presented on the example of two chips, ABCD and DTMROC dedicated to the one of the general purpose experiments on Large Hadron Collider, ATLAS. The ABCD is the ASIC for the readout of the Semiconductor Tracker (SCT) detector designed using the 0.8 μm BiCMOS technology, and the DTMROC is the readout chip for the Transition Radiation Tracker (TRT) detector, designed using 0.25 μm CMOS technology.