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Receiver considerations for free-space clock distribution systems

机译:自由空间时钟分配系统的接收器注意事项

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摘要

Abstract: A high speed clock distribution network using free space optical interconnects with substrate mode holograms and high speed transmitter/receiver modules is described. An electrically compatible system with signal jitter less than 70/50 ps at 622/840 MHz is demonstrated. To improve the power consumption of receivers, a low noise receiver applying a resonant front end circuit is designed. The receiver performance is presented and the corresponding system issues are discussed. !9
机译:摘要:描述了一种高速时钟分配网络,该网络使用具有衬底模式全息图的自由空间光学互连以及高速发送器/接收器模块。演示了一种电兼容系统,该系统在622/840 MHz时信号抖动小于70/50 ps。为了提高接收器的功耗,设计了一种采用谐振前端电路的低噪声接收器。介绍了接收机的性能,并讨论了相应的系统问题。 !9

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