Gathering effect on Dark Current for CMOS fully integrated-, PIN- photodiodes

摘要

PIN photodiodes are semiconductor devices widely used in a huge range of applications, such as photoconductors, charge-coupled devices, and pulse oximeters. The possibility to combine and to integrate the fabrication of the sensor with its signal conditioning circuitry in a CMOS process flow opens the window to device miniaturization enhancing its properties and lowering the production and assembly costs. This paper presents the design and characterization of silicon based PIN photodiodes integrated in a CMOS commercial process. A high-resistivity, low impurity float zone substrate is chosen as the start material for the PIN photodiode array fabrication in order to fabricate devices with a minimum dark current. The photodiodes in the array are isolated by a guard ring consisting of a n~+-p~+ diffusions. However, the introduction of the guard ring design, necessary for photodiode-to-photodiode isolation, leads to an increase of the photodiodes dark current. In this article, the new parasitic term on the dark current is identified, formulated, modelled and experimental proven and has finally been used for an accurate design of the guard ring.