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Roadmap for High Efficiency Solid-State Neutron Detectors

机译:高效固态中子探测器的路线图

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摘要

Solid-state thermal neutron detectors are generally fabricated in a planar configuration by coating a layer of neutron-to-alpha converter material onto a semiconductor. The as-created alpha particles in the material are expected to impinge the semiconductor and create electron-hole pairs which provide the electrical signal. These devices are limited in efficiency to a range near (2-5%)/cm~2 due to the conflicting thickness requirements of the converter layer. In this case, the layer is required to be thick enough to capture the incoming neutron flux while at the same time adequately thin to allow the alpha particles to reach the semiconductor. A three dimensional matrix structure has great potential to satisfy these two requirements in one device. Such structures can be realized by using PIN diode pillar elements to extend in the third dimension with the converter material filling the rest of the matrix. Our strategy to fabricate this structure is based on both "top-down" and "bottom-up" approaches. The "top down" approach employs high-density plasma etching techniques, while the "bottom up" approach draws on the growth of nanowires by chemical vapor deposition. From our simulations for structures with pillar diameters from 2 μm down to 100 nm, the detector efficiency is expected to increase with a decrease in pillar size. Moreover, in the optimized configuration, the detector efficiency could be higher than 75%/cm~2. Finally, the road map for the relationship between detector diameter and efficiency will be outlined.
机译:固态热中子探测器通常通过在半导体上涂覆一层中子-α转换器材料制成平面结构。材料中所产生的α粒子有望撞击半导体并产生提供电信号的电子-空穴对。由于转换器层的厚度要求冲突,这些器件的效率被限制在接近(2-5%)/ cm〜2的范围内。在这种情况下,要求该层足够厚以捕获入射的中子通量,同时又要足够薄以允许α粒子到达半导体。三维矩阵结构具有在一个设备中满足这两个要求的巨大潜力。这种结构可以通过使用PIN二极管柱状元件在第三维中延伸而转换器材料填充矩阵的其余部分来实现。我们制造这种结构的策略是基于“自上而下”和“自下而上”的方法。 “自上而下”的方法采用高密度等离子体蚀刻技术,而“自下而上”的方法则利用化学气相沉积法生长纳米线。根据我们对柱直径从2μm到100 nm的结构的模拟,检测器效率有望随着柱尺寸的减小而增加。而且,在优化配置下,探测器效率可以高于75%/ cm〜2。最后,将概述检测器直径与效率之间关系的路线图。

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