Architectural Enhancements for Secure Embedded Processing

摘要

In this paper, we present architectural enhancements for ensuring secure execution of programs on embedded processors. The primary motivation behind this work is that software attacks often originate from unknown vulnerabilities in trusted programs. We propose two techniques to achieve secure program execution. They include (ⅰ) hardware-assisted monitoring of a trusted program's control flow to detect deviant control flow, and (ⅱ) hardware-assisted validation of a program's data properties that may be violated in the event of an attack. Experiments show that the proposed architecture can be very effective in preventing a wide range of security threats.