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An approach to approximate computing: Logic transformations for one-minterm changes in specification

机译:近似计算的方法:规范中的一个minterm变化的逻辑变换

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Here we consider one special situation for approximate computing. Given a specification, S, in a truth table and its corresponding multi-level logic circuit implementation, I, S is changed to S' by only changing the truth table value for exactly one minterm from 0 to 1 or 1 to 0. We would like to transform I into I' in such a way that I' is equivalent to S' This is a sort of basic operations for approximate logic synthesis, as the functional changes are minimal (only for one minterm). We experimentally show that even if we change functions for all of the gates in the circuit, I, without changing their input signals (their immediate fanins), i.e., no topological changes, the circuit can never become equivalent to S' for all the cases we tried. However, if we allow to change the function of only one gate in the last level of the circuit, I, and allow to change its input signals as well, the circuit becomes equivalent to S' around 13% of the cases in average with in average additional 1.1 inputs to the gate in the last level. We also experimentally show that one minterm changes in truth tables are, comparing with one and two products changes where all minterms inside the products are changed, the most difficult problems to accommodate from the viewpoint of Engineering Change Order (ECO) or logic debugging, when the circuits are implemented as multi-level logic.
机译:在这里,我们考虑一个特殊情况以实现近似计算。给定规范,在实际表及其相应的多级逻辑电路实现中,I,S,S,S,通过仅将真实表值更改为恰好一个Minterm,从0到1或1到0更改为S'。我们会喜欢将I“转换为我”等同于S“,这是一种用于近似逻辑合成的一种基本操作,因为功能改变是最小的(仅用于一个Minterm)。我们通过实验表明,即使我们改变电路中所有门的函数,我,在不改变它们的输入信号(其立即扇形),即没有拓扑变化,电路永远不会相当于S'。我们尝试了。但是,如果我们允许在电路的最后一个级别更改一个门的功能,并且也允许改变其输入信号,但电路平均左右的案例约为13 %。平均额外的1.1输入到最后级别的门。我们还在实验表明,与产品内部的所有Minterms更改的所有Minterms发生变化,从工程变更顺序(ECO)或逻辑调试的角度来看,有一个Minterms的变化电路实现为多级逻辑。

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