Interactive presentation abstract: Automated correction of design errors by edge redirection on high-level decision diagrams

摘要

The complexity of digital nanoelectronics designs has reached a level where it is an immense challenge to guarantee their functional correctness. Previous research has been focused on verification solutions that detect errors. However, root causes of the errors must be diagnosed and the bugs corrected, which currently is mostly manual tedious ad hoc work. Verification tools merely provide counterexamples for the design engineer. Such counterexamples contain too much information for a designer to handle but still too little information to identify the cause of the error.