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A reduced voltage rated unified power quality conditioner for harmonic compensations

机译:减少电压额定统一功率质量调节器,用于谐波补偿

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“Power Quality (PQ)” is used to describe the electrical phenomenon manifested in terms of variations in current, voltage and/or frequency that produce undesirable effects in the power system. This paper presents a reduced DC-link voltage rated Unified Power Quality Conditioner (UPQC) which eliminates current and voltage harmonics in a distribution network thereby improving the quality of power. Series capacitors have been introduced in series with the coupling inductors on the shunt filter side of the UPQC. The proposed topology helps in reducing the voltage rating of DC-link capacitor without compromising on the harmonic mitigation and thus acts as a cost effective solution in the distribution side. A simulation study of the new topology has been made in a three phase three wire system and is compared with the conventional topology of UPQC. The results are presented in the paper to show the validity of the proposed scheme. State space modelling of the modified UPQC has been implemented and stability analysis is also performed to prove the robustness of the system.
机译:“功率质量(PQ)”用于描述在产生不期望的电力系统中产生不希望的效果的电流,电压和/或频率方面表现出的电力现象。本文提出了一种减少的直流链路电压额定统一的功率质量调节器(UPQC),其消除了分配网络中的电流和电压谐波,从而提高了功率的质量。串联电容器已串联引入UPQC的分流过滤器侧上的耦合电感器。所提出的拓扑有助于降低DC-LINK电容器的电压额定值而不损害谐波缓解,因此作为分配侧的成本有效的解决方案。新拓扑结构的模拟研究已经在三相三线系统中进行,并与常规拓扑结构进行了比较。该结果列于本文中,以显示拟议方案的有效性。已经实现了改进的UPQC的状态空间建模,并且还执行稳定性分析以证明系统的稳健性。

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