Voltage Dip Analyzing Method for Multiple Faults Condition in Complex Power Network

摘要

This paper proposed a voltage dip analyzing method for multiple faults condition in complex power network. This method regarded the fault points as virtual buses and introduced multiple fault position parameters into voltage dip analysis. It expanded the node impedance matrix by calculating the self-impedance of the virtual bus, the mutual impedance between virtual bus and non-fault bus, one virtual bus and another. According to the faults boundary conditions, each fault current phasor was calculated. The fault voltage function of any bus related with the multiple fault position parameters in the power network was derived. The voltage dip analysis result was obtained associated with the voltage dip threshold. The proposed method was validated in the standard IEEE-30 bus system.