Correction Method of Testability Verification Test Plan for Electronic Product Based on Physics of Failure

摘要

The traditional method to design the testability verification test plan is highly dependent on the accuracy of the Failure Mode and Effect Analysis data. And there is always lack of reference when designing test plan for multi-pin chip. Such test plans, designed empirically, will not only bring the risk of products being damaged during the test, but also may lead to inaccurate test results and evaluation results. Therefore, through the introduction of the Physics of Failure technology, this paper transforms and uses the fault information matrix, one of the failure analysis results of electronic products, to provide reasonable basis for the formulation and optimization of test statistic plan and fault injection plan during testability verification. Then, this paper proposes a correction method for testability verification test plan, which lays the foundation of the accurate and objective verification and evaluation of the level of testability design for electronic products.