A New PWM Technique for Cascade H-Bridge with Reduced Switching Losses

摘要

In a medium/high voltage and power applications, multilevel inverters (MLI) has been very much influenced by its numerous advantages over two-level inverter. Cascaded H-bridge (CHB) MLI topology has been extremely used topology due to its modularity in the structure. However, with the increase in the number of levels at the output, the number of power semiconductor devices escalates. The power losses associated with the power semiconductor devices also increases, makes the system inefficient. In the power converters, switching losses plays an important role when they are operated at high frequency. This paper aims to propose a new pulse width modulation (PWM) technique which reduces the switching losses compared to conventional sinusoidal PWM. The idea of the proposed PWM technique is based on the selection of variable switching frequency for different modules of an MLI. The proposed method has been simulated using MATLAB and PLECS software for a different number of levels to validate the theoretical aspect of the proposed technique. The proposed PWM technique has been compared with the conventional SPWM technique to demonstrate the reduction of switching losses.