A radix-2 16 bits CORDIC (CoOrdinate Rotation DIgital Computer) architecture which includes pipelined and parallelism is presented in this paper. A full custom technology for CORDIC datapath which is used in the proposed architecture for 16-bit precision can improve the throughout and decrease the area. As a result, the silicon area of the data-path is 11699.877μm2 in the 45nm CMOS technology library and the critical path delay is 875ps at the SS (Slow-Slow) corners whose Voltage and Temperature are 1.1V and 75° respectively. Based on the layout level, the simulation results show that the design has characteristics of high speed and small area in full custom technology.
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