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Research on High Precision AC Voltage Phase and Amplitude Detection Algorithms Based on SPLL and CORDIC

机译:基于SPLL和CORDIC的高精度交流电压相位和幅度检测算法研究

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Aiming at the problem that SPLL (Software Phase Locked Loop) operation is slow and CORDIC (Coordinate Rotation Digital Computer) algorithm is susceptible to interference, an AC voltage phase and amplitude detection system based on SPLL and CORDIC is proposed. Using DSP (Digital Signal Processor) to run code of SPLL algorithm and FPGA (Field Programmable Gate Array) to run CORDIC algorithm circuit, the phase and amplitude of three phase AC voltage obtained by two chips are processed in DSP to improve the detection accuracy of phase and amplitude, thereby improving the control accuracy of parallel algorithm of auxiliary inverters for rail vehicles, and the phased-locked time is reduced.
机译:针对SPLL(软件锁相环)操作慢朗(坐标旋转数字计算机)算法易受干扰的问题,提出了基于SPLL和CORDIC的AC电压相和幅度检测系统。 使用DSP(数字信号处理器)运行SPLL算法和FPGA(现场可编程门阵列)的代码来运行CORDIC算法电路,在DSP中处理由两个芯片获得的三相交流电压的相位和幅度,以提高检测精度 相位和幅度,从而提高了轨道车辆的辅助逆变器的并行算法的控制精度,并且降低了锁定时间。

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