The authors have presented an accelerator for RISC-V ecosystem suitable for cryptographic applications. The present implementation of the accelerator is limited to a simple stream and symmetric cipher; it can be further developed into a complex cryptographic algorithm implementation, which will open a lot many doors in hardware implementation and applications of cryptographic algorithms. By implementing specialized hardware for complex algorithms and using them as accelerators to processors (GPUs) in an SoC environment, we are enabling higher efficiency in computation when compared to software enabled algorithm implementation with a GPU.
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