This paper presents an architecture for an embedded multi-antenna digital GNSS receiver. A two-stage adaptive beamformer for interference suppression and Line-of-Sight (LoS) signal amplification is presented and analyzed w.r.t. to an efficient implementation on embedded receivers. Jammer signals are mitigated at pre-correlation stage whereas the LoS signals are amplified at post-correlation stage. The method is based on a subspace-based approach where filter coefficients are derived from the eigenvalues and -vectors of the covariance matrix. In the first stage, the covariance matrix is determined immediately from the digital antenna signals for interference mitigation and in the second stage, the matrix is computed based on the correlator outputs of each satellite in LoS. Dedicated buildingblocks for covariance matrix estimation and filtering are required for interference mitigation since this operation is computed on sampling rate. A fixed-point VHDL implementation and related costs in terms of logic-cell requirements on an FPGA are provided for both blocks. Eigendecomposition is computed on an embedded processor. The implementation of two decomposition algorithms (one for interference mitigation and the other one for LoS-signal amplification) are presented. Optimizations and costs in terms of processing-cycles on an embedded processor are provided.
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