A Mixer-1st Auxiliary Receiver for Full-Duplex Self-Interference Cancellation

摘要

This paper presents a low-power highly linear mixer-1^{st receiver to be used as an auxiliary receiver in a full-duplex transceiver architecture with self-interference cancellation. The auxiliary mixer-1st receiver in-band performance, which is the most critical one for this application, is mainly determined by the baseband trans-impedance amplifier. The design is based on a wideband three-stage operational transconductance amplifier that draws 3 mA from a 1.8 V supply. A simple technique is presented to improve the achievable signal-to-noise-and-distortion ratio in this type of receiver designs. A prototype receiver implemented in a 28nm CMOS technology achieves a noise figure of 10 dB, in-band/out-of-band IIP3 of 11 dBm and 22 dBm respectively. The chip occupies an area of 640 × 490 μm.}