Keynote 2: Versal: The new Xilinx Adaptive Compute Acceleration Platforms (ACAP)

摘要

In this presentation I will present the new Adaptive Compute Acceleration Platform. I will show the overall system architecture of the family of devices including the Arm cores (scalar engines), the programmable logic (Adaptable Engines) and the new vector processor cores (AI engines). I will focus on the new AI engines in more detail and show the concepts for the programming environment, the architecture, the integration in the total device, and some application domains, including Machine Learning and 5G wireless applications. I will illustrate the initial design rationale and the architecture tradeoffs. These platforms extend the concept of tuning the memory hierarchy to the problem.