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Fabrication tolerant flat-top interleavers

机译:制造宽容平板交织器

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Integrated circuits based on micron-scale silicon waveguides have the clear advantage of being tolerant to fabrication errors, thanks to the high mode confinement within the guiding core. Here we show how flat-top interleavers can be achieved on a micron-scale silicon photonics platform based on ring-loaded Mach-Zehnder Interferometers (MZIs), without the need for any thermal tuning. Robust designs are also guaranteed by resorting to Multi-Mode Interferometers (MMIs) as power splitters in both the MZIs and the ring resonators. A trade-off between in-band ripple and roll-off can be achieved by changing the ring splitting ratios. In particular rings with different finesse based on MMIs with 50:50, 72:28, and 85:15 splitting ratios have been designed, fabricated and successfully tested. In-band ripples as low as 0.2 dB and extinction ratios exceeding 15 dB have been measured from the fabricated samples. Repeatability of the performances from chip to chip and wafer to wafer is presented to show the tolerance of the devices to fabrication errors. Even though these particular devices have been designed for TE polarization only, polarization insensitive designs can be also achieved. All designs are based on strip waveguides and compact Euler-bends, leading to footprints in the order of 700x300 jam2, also thanks to an optimized configuration. They can find applications as interleavers as such or as stages in cascades of N interleavers to achieve flat-top l×2~N (de)multiplexers.
机译:由于引导芯内的高模式限制,基于微米级硅波导的集成电路具有可容忍制造误差的明显优点。在这里,我们展示了如何在基于环形型Mach-Zehnder干涉仪(MZIS)的微米级硅光子电平台上实现平顶交织器,而无需任何热调谐。通过借助MUZIS和环谐振器中的电源分路器,还可以保证鲁棒设计。可以通过改变环分裂比来实现带内纹波和滚动之间的折衷。与基于的MMI用50:50,72:28和85:15的分束比已经设计了不同的精细度特定环,制造和测试成功。带有低至0.2dB的带内涟漪和超过15dB的消光比已经从制造的样品中测量。提出了从芯片到芯片和晶片到晶片的性能的可重复性,以显示器件对制造误差的公差。尽管这些特定设备仅用于TE极化,但也可以实现极化不敏感的设计。所有的设计是基于条波导和紧凑欧拉 - 弯曲,导致的700x300 jam2,也由于一个优化的配置顺序的脚印。它们可以作为交织者找到应用程序,或者作为N个交织器级联的阶段,以实现平顶L×2〜N(DE)多路复用器。

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