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1W < 0.9dB IL DC-20GHz T/R switch design with 45nm SOI process

机译:1W <0.9DB IL DC-20GHz T / R开关设计,具有45nm SOI过程

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In this paper, we discuss a DC-20GHz single-pole double-throw (SPDT) transmit/receive switch (T/R switch) design in 45nm SOI process. This circuit is dedicated to fully integrated CMOS RF front end modules for X/Ku band satellite communication applications. The switch exhibits a measured insertion loss of 0.59dB, return loss of 23dB, and isolation of 17dB at 14GHz. The input 1dB compression point is 31.5dBm, and one-tone IIP3 is 63.8dBm. This state of the art performance is comparable or even better than existing commercial GaAs SPDT in this frequency range. The core area is only 90um × 100um, which is very helpful for low cost large element phase array designs.
机译:在本文中,我们讨论了45nm SOI过程中的DC-20GHz单极双掷(SPDT)发射/接收开关(T / R开关)设计。该电路专用于全集成的CMOS RF前端模块,用于X / KU带卫星通信应用。该开关表现出0.59dB的测量损耗,返回23dB的返回损耗,并在14Ghz下分离17dB。输入1DB压缩点为31.5dBm,单音IIP3为63.8dBm。这种最先进的性能比在该频率范围内的现有商业GaAS SPDT比较甚至更好。核心区域仅为90um×100um,这对于低成本大的元素相位阵列设计非常有用。

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