A System-in-the-Loop Methodology for the Validation of DC-Connected Converters

摘要

In this paper, a systematic methodology for the validation of electrical energy systems using real-time simulation is developed, referred to as a System-in-the-Loop (SysiL) methodology. The aim of SysiL is to provide a structured and systematic framework for validation, which includes the well-known concepts Hardware-in-the-Loop (HiL), Rapid Control Prototyping (RCP), and their derivatives like Power-Hardware-in-the-Loop (PHiL) and Controller-Hardware-in-the-Loop (CHiL). As electrical energy systems get more complex, with strong interaction between systems and components, a sufficient test and fault coverage cannot be achieved by open-loop testing alone. Here, the focus lies on validation of dc-connected converters, with which the SysiL framework is demonstrated. The framework is applied to HiL validation of laboratory-scaled Modular Multilevel Converter (MMC) controller designs, showing experimental results and the sufficiency of both the designs and the SysiL approach, as well as validation of Commutation Cells (CCs) and their controllers for such an MMC with PHiL simulations.