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Energy efficient 8-bit microprocessor for wireless sensor network applications

机译:用于无线传感器网络应用的节能8位微处理器

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Due to high demand of ‘green’ electronics for portable devices, an 8-bit microprocessor with low power features is proposed. The proposed microprocessor is designed using Silterra 130nm general (G) and low power (LP) CMOS logic processes with chip layout size of 4900 μm2. Both processors are designed to operate at supply voltage of 1.2V with clock frequency of 50MHz. A substantial reduction of the leakage power is observed between G and LP processes where the 130LP-process microprocessor showed reduction in 3 orders of magnitude in comparison to its 130G-process counterpart. Low power clock gating technique is then being applied to the design in order to obtain further power reduction and this technique has successfully reduced the dynamic power of the design by 44.6%.
机译:由于对便携式设备的“绿色”电子产品的高需求,提出了一种具有低功率特征的8位微处理器。所提出的微处理器使用硅胶130nm(g)和低功率(LP)CMOS逻辑工艺设计,芯片布局尺寸为4900μm 2 。两个处理器都设计为以1.2V的电源电压运行,时钟频率为50MHz。在G和LP工艺之间观察到泄漏功率的显着减小,其中130LP处理微处理器与其130G-Process对应物相比显示了3个数量级的减少。然后将低功率时钟门控技术应用于设计,以获得进一步的功率降低,并且该技术成功将设计的动态功率降低了44.6%。

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