IMPLEMENTATION OF A DUAL-PHASE LOCK-IN AMPLIFIER ON A TMS320C5515 DIGITAL SIGNAL PROCESSOR

摘要

A digital dual-phase lock-in amplifier that is capable to run on a low-cost, low-power platform comprising a 16-bit fixed-point digital signal processor was developed. This is achieved by a set of optimised digital filters including an exponential averager to adjust the time constant of the overall filter. The reference frequency is generated using a direct digital synthesis.source utilising angle decomposition with a resolution of 1 Hz. The digital lock-in algorithm is described and the performance of the algorithm is analysed. The experimental results show that the developed lock-in amplifier achieves similar performance to a commercially available lock-in amplifier.