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The Design and Implementation of Signal Reconnaissance Receiver Based on FPGA

机译:基于FPGA的信号侦察接收机的设计与实现

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In this paper, a wideband, gain-flattened, highly-linear signal reconnaissance receiver worked on UAV with high sensitivity and high Dynamic range is proposed for complex electromagnetic environment of space and variable transmitter source. The reconnaissance receiver used field programmable gate array (FPGA) and some supporting chip and circuit to accomplish the frequency select and data storage. In order to reduce the noise figure, enhance the sensitivity and gain flatness, the design system used specific integrated circuit, variable gain amplifier (VGA), low noise amplifier (LNA), frequency selective circuit. And gain-flatness enhanced circuit. After some series of tests carried out by the unmanned helicopter, the tests and measured data and figure shows it can detect and receive the signal between 100MHz and 500MHz, the sensitivity is between -100dBm and -120dBm, the dynamic range is 70dB at least, it can suppress the strong narrowband interference (NBI).
机译:本文采用宽带,增益平坦的高度线性信号侦察接收器,用于具有高灵敏度和高动态范围的UAV,用于空间和可变变送器源的复杂电磁环境。侦察接收器使用现场可编程门阵列(FPGA)和一些支持芯片和电路,以完成频率选择和数据存储。为了减少噪声系数,增强灵敏度和增益平坦度,设计系统使用特定的集成电路,可变增益放大器(VGA),低噪声放大器(LNA),频率选择电路。和平坦增强电路。经过一系列由无人驾驶直升机进行的测试,测试和测量数据和图显示它可以检测和接收100MHz和500MHz之间的信号,灵敏度在-100dBm和-120dBm之间,动态范围至少为70dB,它可以抑制强窄带干扰(NBI)。

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