Hardware efficiency versus error probability in unreliable computation

摘要

For the purpose of mitigating the effect of transient error in unreliable architecture, many authors have proposed redundant computation (sensitive to error) and an error-free correction unit. In this paper, taking into account that the correction unit is also subject to error, we propose to evaluate the quality of an architecture using not only its efficiency (i.e. the normalized number of operation per area and per unit of time), but also its final output error rate. The new criteria, namely Reliability-Efficiency Criteria (RE-Criteria) thus defines a two dimensional space of solution, i.e. a Pareto distribution [1]. After revisiting well-known correcting techniques with the RE-Criteria, we give an example of Pareto distribution based on a classical FIR filter performed with the error-correcting mechanism based architectures.