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Verification Tool and Unified Specifications for Embedded Software

机译:嵌入式软件的验证工具和统一规范

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In the extended abstract, our on-going research project Verification Tool and Unified Specifications for Embedded Software is explained. In the project, we are developing an upper-process support tool that helps ones formalize specifications of embedded software and verify a certain type of consistency and correctness unless formal method background is equipped. The tool is based on a proof assistant system (Agda) and a software development system (VDM tools), but is designed with the concept of lightweight formal methods. The project is being promoted as joint research with CSK systems West Japan, CSK systems and Macs co. ltd, under the program of the Ministry of Economy, Trade and Industry.
机译:在扩展摘要中,解释了我们正在进行的研究项目验证工具和嵌入式软件的统一规范。在该项目中,我们正在开发一个上流程支持工具,帮助嵌入式软件正式化规范,并验证某种类型的一致性和正确性,除非配备了正式的方法背景。该工具基于校样助理系统(AGDA)和软件开发系统(VDM工具),但概念设计为轻量级形式方法。该项目正在促进与CSK系统西日本,CSK系统和MACS有限公司的联合研究。有限公司,在经济,贸易和工业部的方案下。

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