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Run-Time Adaptable Architectures for Heterogeneous Behavior Embedded Systems

机译:用于异构行为嵌入式系统的运行时适应性架构

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As embedded applications are getting more complex, they are also demanding highly diverse computational capabilities. The majority of all previously proposed reconfigurable architectures targets static data stream oriented applications, optimizing very specific computational kernels, corresponding to the typical embedded systems characteristics in the past. Modern embedded devices, however, impose totally new requirements. They are expected to support a wide variety of programs on a single platform. Besides getting more heterogeneous, these applications have very distinct behaviors. In this paper we explore this trend in more detail. First, we present a study about the behavioral difference of embedded applications based on the Mibench benchmark suite. Thereafter, we analyze the potential optimizations and constraints for two different run-time dynamic reconfigurable architectures with distinct programmability strategies: a fine-grain FPGA based accelerator and a coarse-grain array composed by ordinary functional units. Finally, we demonstrate that reconfigurable systems that are focused to single data stream behavior may not suffice anymore.
机译:随着嵌入式应用越来越复杂,他们还要求高度多样化的计算能力。广大先前提出的可重构架构的目标静态数据流应用为导向,优化非常具体的计算内核,对应于过去典型的嵌入式系统特性。现代嵌入式设备,但是,完全实行新的要求。他们预计,以支持各种各样的方案在单一平台上。除了获取更多的异构,这些应用程序有非常独特的行为。在本文中,我们将更详细地研究了这一趋势。首先,我们提出了一个关于基础上,Mibench基准套件嵌入式应用的行为差异的研究。此后,我们分析潜在的优化和约束对于两个不同的运行时动态可重构体系结构具有不同的可编程性策略:细粒度FPGA基于加速器和由普通的功能单元组成的粗粒度阵列。最后,我们证明该集中对单个数据流的行为可重构系统可能不足以了。

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