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Via2 - Laser Embedded Conductor Technology 2008 The 3rd IMPACT and 10th EMAP Joint Conference

机译:通过 2 - 激光嵌入式导线2008 2008第三次影响和第10次EMAP联合会议

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While semiconductor technology progresses at an alarming rate, typically doubling in functionality every couple of years, the substrate portion of the integrated circuit (I.C.) packaging industry continues to fall further and further behind. This has created a significant technology gap, forcing the semiconductor manufacturers to compensate their chip design by adding more redistribution layers or even worse, adding additional size to the chip itself. There is, therefore, a real need for significant change in manufacturing methods used at the substrate level, to remove this ever widening gap and thus allow the chip manufacturers to continue their path towards reduction in size and cost, while still increasing product functionality. A collaborative effort between Amkor Technology, Unimicron and Atotech, has led to a significant new breakthrough in substrate manufacturing techniques, allowing layer, design feature and format reduction (thus cost reduction) versus current state of the art technologies. This innovative method utilizes laser ablation techniques, together with specially developed plating processes, to form electrical paths for signal propagation embedded within the dielectric, rather than the more conventional conductors on the dielectric layer. This paper is the second part of a two part paper co-authored by Atotech (Dave Baron) and Amkor Technology. This paper describes the opportunity to reduce the number of vias and layers in the substrate, the unique opportunity to optimize electrical performance, and the potential miniaturization in design as a result.
机译:虽然半导体技术以惊人的速度进行,但每隔几年通常在功能上加倍,而集成电路(即)包装行业的基板部分继续进一步下降。这创造了一个重​​要的技术差距,强迫半导体制造商通过添加更多的再分配层或更糟糕,为芯片本身添加额外尺寸来补偿它们的芯片设计。因此,存在实际需要在基板水平上使用的制造方法的显着变化,以消除这种差距的这种变化,因此允许芯片制造商继续降低尺寸和成本的路径,同时仍然增加产品功能。 AMKOR技术,UniMicron和Atotech之间的协作努力导致了基板制造技术中的显着新的突破,允许层,设计特征和格式减少(因此降低成本)与现有技术的当前状态。这种创新方法利用激光消融技术,以及特殊开发的电镀工艺,形成用于嵌入电介质内的信号传播的电路,而不是更传统的电介质层。本文是由Atotech(Dave Baron)和Amkor Technology共同撰写的两部分文件的第二部分。本文介绍了减少基板中的通孔和层数的机会,是优化电气性能的独特机会,以及由于设计的潜在小型化。

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