A 40-dBm OIP3, 2-GHz Silicon Bipolar LNA

摘要

A 2-GHz silicon bipolar LNA, based on a cascode architecture, implementing input and output matching networks, and designed to simultaneously optimize matching, noise and linearity, is presented. The LNA exhibits a gain of 18 dB, a noise figure of 1.6 dB and an OIP3 of +40 dBm, while consuming only 4 mA. To measure the linearity performance a non-conventional test-bench was developed. Statistical simulations and measurements were carried out on the LNA revealing a high sensitivity of the OIP3 to process variations. A technique to restore the linearity performance is also described.