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Capacitance Voltage Characteristics of Polysilicon - Polysilicon Oxide - Polysilicon Structures for Three-Dimensional Memory

机译:多晶硅电容电压特性 - 多晶硅氧化铝 - 三维记忆的多晶硅结构

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Three-dimensional integration offers a dramatic reduction in chip area required per bit and has long been a research objective. Three-dimensional integration with thin film transistors (TFTs) requires detailed parametric analysis with techniques such as Capacitance-Voltage (CV) Characterization. CV analysis of polysilicon TFTs uses polysilicon-oxide-polysilicon thin film structures. Most of the CV analysis involving polysilicon available to date, however, is with polysilicon-oxide-bulk silicon structures. In this paper, we report the results of modeling and measurement of the CV characteristics of polysilicon-polysilicon oxide-polysilicon for doped and undoped polysilicon. To increase the conductivity of the polysilicon, elevated temperatures were used for measurement. CV measurements matching the theoretical curves were made for these polysilicon thin films. Oxide thickness, series and shunt resistance were extracted and correlated to process problems and splits.
机译:三维集成在每位所需的芯片面积中提供了剧烈的减少,并且长期以来一直是研究目标。与薄膜晶体管(TFT)的三维集成需要详细的参数分析,具有诸如电容 - 电压(CV)表征的技术。多晶硅TFT的CV分析使用多晶硅氧化物 - 多晶硅薄膜结构。然而,涉及多晶硅的大多数CV分析,然而,迄今为止是多晶硅氧化物 - 散硅结构。在本文中,我们报告了用于掺杂和未掺杂的多晶硅的多晶硅 - 多晶硅氧化物 - 多晶硅的CV特性的建模和测量结果。为了增加多晶硅的电导率,使用升高的温度用于测量。对这些多晶硅薄膜制造了与理论曲线的CV测量。提取氧化物厚度,串联和分流抗性,与处理问题和分裂相关。

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