ON THE DESIGN OF ON-CHIP TUNING LOOPS FOR HIGH-PERFORMANCE,HIGH-FREQUENCY OTA-C FILTERS IN STANDARD CMOS TECHNOLOGY

摘要

Design considerations for a new continuous time filter tuning loop,the Correlated Tuning Loop(CTL),are discussed.Simulation presents a major difficulty and a custom behavioral simulator is introduced to overcome these problems.Simulation results show promising performance in the tuning of very high frequency filters with this loop.