Design of a Delta-Sigma (Δ-∑) Based Digital-to-Analog Converter for TETRA-2 Transmitter

摘要

This paper describes the design of a delta-sigma (Δ-∑) based Digital-to-Analog Converter (DAC) for a TETRA-2 transmitter along with the on-chip analog filtering to meet adjacent channel specifications. The proposed design meets the adjacent channel requirements with a margin of over 10 dB which is adequate to cater for hardware implementation. As the design specifications are in process of being finalised for TETRA-2, this paper will provide a valuable reference for designers involved with development of TETRA-2 radio equipment.