Design Theory and Library Development of Vertical Dual Carrier Field Effect Transistor ASIC and SOC on SiO{sub}2 and Insulating GaAs Substrate with Effective Channel Length of 5-30nm

摘要

Design theory and library development of Vertical Dual Carrier Field Effect Transistor (VDCFET) ASIC and SOC on SiO{sub}2 and insulating GaAS substrate are presented for VDCFET with effective channel length of 5-30nm. These ASIC and SOC can be designed for different materials. For different applications, these VDCFET have different equivalent circuits, thus different library development are described. It is to be emphasized that these VDCFET ASIC and SOC, with effective channel length of 5-30nm, can be fabricated with lithographic equipment for linewidths of 90nm, 130nm, 180nm or more.