A practical method for synthesis of optimized inductor circuits in CMOS technologies with lossy silicon substrates is proposed. This method is based on an optimization with constraints process on a simplified broadband model of the spiral inductor. The need for correcting the previously used substrate loss models is emphasized. Unlike optimization with constraints based on geometric programming the proposed method does not require a specific shape of the modelling equations and can be easily implemented in traditional software packages such as Matlab. The results are validated using ASITIC for frequencies up to 9 Ghz. ASITIC is an interactive CAD tool that aids RF/microwave and high-speed digital engineers to analyze, model, and optimize passive and interconnect metal structures residing on a lossy conductive substrate.
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