Low power logical element for FPGA fabric

摘要

Logical Element (LE) is the basic building block of FPGA fabric or any re-configurable computing machines. Logical Element basically consists of look-up tables [1]. This paper shows a low power LE. The Low power is achieved by taking advantage of the commutative property of operations. This property will allow the data t) be re organized such that there will be separate paths for logic state 0 and logic state 1. The approach is targeted to reduce switching activity when possible. This paper shows 28% increase in power savings.