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Configurable and Efficient Memory Access Tracing via Selective Expression-Based x86 Binary Instrumentation

机译:基于选择性表达式的X86二进制仪器可配置和高效的内存访问跟踪

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Memory access tracing is a program analysis technique with many different applications, ranging from architectural simulation to (on-line) data placement optimization and security enforcement. In this article we propose a memory access tracing approach based on static x86 binary instrumentation. Unlike non-selective schemes, which instrument all the memory access instructions, our proposal selectively instruments a subset of those instructions that are the most (or fully) representative of the actual memory access pattern. The selection of the memory access instructions to be instrumented is based on a new method, which clusters instructions on the basis of their compile/link-time observable address expressions and selects representatives of these clusters. This allows for reducing the runtime cost for running instrumented code, while still enabling high accuracy in the determination of memory accesses. The trade-off between overhead and precision of the tracing process is user-tunable, so that it can be set depending on the final objective of memory access tracing (say on-line vs off-line exploitation). Additionally, our approach can track memory access at different granularity (e.g., virtual-pages or cache line-sized buffers), thus having applications in a variety of different contexts. The effectiveness of our proposal is demonstrated via experiments with applications taken from the PARSEC benchmark suite.
机译:内存访问跟踪是一种具有许多不同应用程序的程序分析技术,从架构模拟到(在线)数据放置优化和安全实施。在本文中,我们提出了一种基于静态X86二进制仪器的内存访问跟踪方法。与非选择性方案不同,哪些仪器所有内存访问指令,我们的提议选择性地仪器仪器的那些指令的子集是实际存储器访问模式的最多(或完全)的指令。要被录制的内存访问指令的选择基于新方法,该方法基于其编译/链路时间可观察地址表达式群集指令,并选择这些群集的代表。这允许降低运行仪器代码的运行时成本,同时在确定存储器访问时仍然可以实现高精度。追踪过程的开销和精度之间的权衡是用户可调的,因此可以根据内存访问跟踪的最终目标来设置它(例如在线VS离线开发)。此外,我们的方法可以跟踪不同粒度(例如,虚拟页面或高速缓存线大小缓冲区)的内存访问,从而在各种不同的上下文中具有应用。我们的提案的有效性通过与Parsec基准套件所采取的应用程序进行实验证明。

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