This paper introduces an extension to the sequencing graphs used in traditional high-level synthesis. The reconfigurable sequencing graph is a supergraph that includes reconfiguration steps indicating when and what must be changed in a configuration. In addition, the RSG allows defining the kind of reconfiguration necessary to implement an application. With the RSG, it is also possible to determine in which programmability classes the architecture is classified. Modeling with RSG is independent of technology, because it works in high-level of abstraction, but it can include physical characteristics, in order to better determine the transformations in the reconfiguration graph.
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